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AN-744
EXTERNAL MEMORY INTERFACE
DATA:
16 BITS OF DATA AD[15 - 0] ARE DIRECTLY CON-
A FOOTPRINT FOR A 32 KB 16 SRAM IS PROVIDED ON BOARD
AS WELL AS A FOOTPRINT FOR A 16 -BIT D-LATCH SINCE ADDRESS
AND DATA ARE MULTIPLEXED ON THE EXTERNAL BUS.
THE MEMORY FOOTPRINT IS FOR A CY7C1020CV33 AND THE
LATCH FOOTPRINT IS FOR A 74LVT16373AGG.
NOTE THAT YOU CAN USE DIFFERENT VERSIONS OF THE
CY7C1020CV33 MEMORY, WITH DIFFERENT ACCESS TIMES.
WAIT STATES CAN BE ADDED IN THE XMXPAR REGISTER TO
ALLOW INTERFACING A SLOWER MEMORY IF REQUIRED.
CONNECTIONS
CONTROLS: RS , WS , AND AE ARE THE MINIMUM CONTROL
SIGNALS OF ANY MEMORY INTERFACE.
MSO , MEMORY SELECT IS CONNECTED TO CE TO
ENABLE THE MEMORY ONLY WHEN NECESSARY.
BHE AND BLE ALLOW THE USER TO SELECT THE HIGH
OR LOW BYTE OF THE 16 -BIT MEMORY.
NECTED FROM THE ADUC7026 TO THE MEMORY.
ADDRESSES:
TO ADDRESS 32 KB, ONLY A 14-BIT ADDRESS IS
REQUIRED.
THERE ARE TWO WAYS OF ADDRESSING A 16 -BIT
MEMORY:
1. CONNECTING AD[14-0] TO A[14-0]. TO ENABLE
IT REQUIRES DYNAMIC ADDRESSING (SET BIT 11
IN XMXPAR) TO ADDRESS IN 16 - BIT MODE
INSTEAD OF 8-BIT MODE.
2. CONNECTING AD[15-1] OF THE ADUC702X TO
A[14-0] OF THE MEMORY, WITHOUT USING
DYNAMIC ADDRESSING.
ON THE EVALUATION BOARD, AD[14-0] ARE
CONNECTED. IN SOFTWARE, DYNAMIC ADDRESSING
MUST BE ENABLED.
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FIGURE 2. EXTERNAL MEMORY CONNECTIONS
REV. 0
–5–
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